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MT48LC2M32B2P-6:G TR IC DRAM 64MBIT PAR 86TSOP II Micron Technology Inc.

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MT48LC2M32B2P-6:G TR IC DRAM 64MBIT PAR 86TSOP II Micron Technology Inc.

Name: MT48LC2M32B2P6G TR IC DRAM 64MBIT PAR 86TSOP II Micron Technology Inc
Brand: Micron Technology Inc.
Price: 1 USD

Brand Name : Micron Technology Inc.

Model Number : MT48LC2M32B2P-6:G TR

MOQ : 1

Price : Based on current price

Payment Terms : T/T

Supply Ability : In stock

Delivery Time : 3-5 work days

Packaging Details : anti-static bag & cardboard box

Memory Type : Volatile

Memory Format : DRAM

Technology : SDRAM

Memory Size : 64Mbit

Memory Organization : 2M x 32

Memory Interface : Parallel

Clock Frequency : 167 MHz

Write Cycle Time - Word, Page : 12ns

Access Time : 5.5 ns

Voltage - Supply : 3V ~ 3.6V

Operating Temperature : 0°C ~ 70°C (TA)

Mounting Type : Surface Mount

Package / Case : 86-TFSOP (0.400", 10.16mm Width)

Supplier Device Package : 86-TSOP II

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Product Details

GENERAL DESCRIPTION

The 64Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 67,108,864-bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the 16,777,216-bit banks is organized as 2,048 rows by 256 columns by 32 bits.
Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of an ACTIVE command, which is then followed by a READ or WRITE command. The address bits registered coincident with the ACTIVE command are used to select the bank and row to be accessed (BA0, BA1 select the bank, A0-A10 select the row). The address bits registered coincident with the READ or WRITE command are used to select the starting column location for the burst access.

FEATURES

• PC100 functionality
• Fully synchronous; all signals registered on positive edge of system clock
• Internal pipelined operation; column address can be changed every clock cycle
• Internal banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto Precharge, includes CONCURRENT AUTO PRECHARGE, and Auto Refresh Modes
• Self Refresh Mode
• 64ms, 4,096-cycle refresh (15.6µs/row)
• LVTTL-compatible inputs and outputs
• Single +3.3V ±0.3V power supply
• Supports CAS latency of 1, 2, and 3

Specifications

Attribute	Attribute Value
Manufacturer	Micron Technology Inc.
Product Category	Memory ICs
Series	-
Packaging
Package-Case	86-TFSOP (0.400", 10.16mm Width)
Operating-Temperature	0°C ~ 70°C (TA)
Interface	Parallel
Voltage-Supply	3 V ~ 3.6 V
Supplier-Device-Package	86-TSOP II
Memory Capacity	64M (2M x 32)
Memory-Type	SDRAM
Speed	167MHz
Format-Memory	RAM

Descriptions

SDRAM Memory IC 64Mb (2M x 32) Parallel 167MHz 5.5ns 86-TSOP II

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